Optimized for power, area and latency, the Rambus PCIe 6.0 controller delivers data rates up to 64 Gigatransfers per second (GT/s) for high-performance applications.
In addition, the controller provides state-of-the-art security with an Integrity and Data Encryption (IDE) engine that monitors and protects PCIe links against physical attacks.
"The rapid advancement of AI/ML and data-intensive workloads requires that we continue to provide higher data rate solutions with best-in-class latency, power and area," said Sean Fan, chief operating officer at Rambus. "As the latest addition to our portfolio of industry-leading interface IP, our PCIe 6.0 Controller offers customers an easy to integrate solution that delivers both performance and security for advanced SoCs and FPGAs."
Key features of the Rambus PCIe 6.0 Controller include:
- Supports PCIe 6.0 specification including 64 GT/s data rate and PAM4 signaling
- Supports fixed-sized FLITs that enable high-bandwidth efficiency
- Implements low-latency Forward Error Correction (FEC) for link robustness
- Internal data path size automatically scales up or down (256, 512, 1024 bits) based on max. link speed and width for reduced gate count and optimal throughput
- Backward compatible to PCIe 5.0, 4.0 and 3.0/3.1
- Supports Endpoint, Root-Port, Dual-Mode and Switch port configurations
- Integrated IDE optimized for performance
Rambus Announces the PCIe 6.0 Controller Design for Next-Generation Data Centers
