Nvidia Resolves Design Flaw in Blackwell Data Center GPU

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Nvidia CEO Jensen Huang has confirmed that a design flaw was identified in the upcoming Blackwell data center GPU, which impacted the chip's production at Taiwan Semiconductor Manufacturing Company (TSMC). The flaw, while not compromising the functionality of the Blackwell GPUs, resulted in lower yield rates during manufacturing. Huang acknowledged the issue during an event in Denmark, attributing the setback solely to Nvidia. Collaborating closely with TSMC, the design flaw has been rectified, restoring the production process to expected efficiency levels. 

The information indicated that the Blackwell GPU's release would be delayed due to the aforementioned design error, which also suggested increased tensions between Nvidia and TSMC. However, Huang has refuted these claims, describing them as misinformation. He highlighted the rapid response by TSMC in addressing the design flaw, praising the chip manufacturer's ability to swiftly resume production. This collaboration underscores the robust partnership between Nvidia and TSMC in ensuring the reliability and performance of advanced semiconductor products.

The Blackwell data center GPU, initially announced by Nvidia in March, features a multi-chip architecture comprising two separate dies, each comparable in size to the previous generation H100 GPU released in 2022. Manufactured using TSMC's N4P process, the Blackwell GPU integrates approximately 208 billion transistors. The packaging includes 192GB of HBM3e memory, delivering a memory bandwidth of 8TB/s, and the GPU operates with a thermal design power (TDP) of 1000W. While initial projections slated the Blackwell GPUs for shipment in the second quarter, delays caused by the design flaw have postponed deliveries to the fourth quarter, according to recent statements from Huang.


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