Intel has provided further insights into its upcoming Xeon 6 SoC, codenamed Granite Rapids-D, at the Hot Chips 2024 (HC36) conference held at Stanford University from August 25 to 27, 2024. The company reaffirmed its plans to launch the Xeon 6 SoCs for edge computing and telecom applications in the first half of 2025, as initially announced at MWC 2024.The Granite Rapids-D SoC integrates a Xeon 6 compute chiplet, fabricated on Intel's 3nm process, with an edge-optimized I/O chiplet based on the Intel 4 process. 

The SoC features a compatible BGA package and is available in two sub-series: one with 4-channel memory, likely corresponding to a single compute chiplet, and another with 8-channel memory, expected to correspond to dual compute chiplets. The platform supports MCR DIMM high-speed memory, providing enhanced memory performance.

Granite Rapids-D offers up to 32 PCIe 5.0 lanes, up to 16 PCIe 4.0 lanes, and up to 16 CXL 2.0 lanes. Additionally, it can be configured with dual 100Gb Ethernet ports, making it suitable for high-bandwidth applications.

The Xeon 6 SoC includes built-in accelerators such as Media Accelerator, QAT, DLB, vRAN Boost, and DSA, which are designed to optimize performance for edge computing tasks. The SoC also supports edge-specific enhancements, including an extended operating temperature range and industrial-grade reliability, making it a strong solution for demanding environments.