AMD Ryzen AI Medusa Point: Chiplet Design and Enlarged Socket

Published by

teaser
Looking at the latest shipping docs, it appears that AMD’s new Medusa Point APU might feature a chiplet-based design. Early information shows a 12-core Zen 6 module built on TSMC’s 3 nm process, paired with a separate mobile client I/O die made using the N4P process. This is quite a shift from the one-piece design of the current 4 nm Ryzen AI Strix Point chips. Tech gurus are noting that this split design could help boost both performance and efficiency, fitting well with current trends in chip design and manufacturing.

New pre-launch details from the “MEDUSA01” manifest have also pointed out that the upcoming Ryzen AI processors will likely use a larger socket. The documents list the FP10 socket with dimensions of 25 mm by 42.5 mm—about a 6% increase over the FP8 socket found in the current models. Gurus are now looking at these measurements to figure out what a bigger socket could mean for cooling solutions and chip layout in mobile devices, especially as manufacturers look to balance performance with practical design needs.

Comparing the Medusa Point APU to today’s offerings, it’s clear that AMD is updating both the chip design and the socket layout. The move to a larger socket might allow for extra features or better cooling options, while the shift from an RDNA 4 to an RDNA 3.5 graphics setup shows a focus on balancing power and efficiency. 

1743091415_guru3d

Sources: WccftechPCGH

Share this content
Twitter Facebook Reddit WhatsApp Email Print